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Welcome to the ALARM-Based Computing Research Project at Harvard

Reliable and efficient power delivery is critical to all types of computing systems. As designers seek to reduce the power consumption of systems by reducing the supply voltage, systems will begin to experience power supply fluctuations due to the finite impedance of the power supply network. These supply fluctuations, referred to as voltage emergencies, must be managed by the system to provide correctness. Our research seeks ways to handle these alarm conditions through a combined hardware/software approach. In addition to handling these alarm conditions, we consider the problem of voltage selection for power management. Energy-constrained systems typically will employ dynamic voltage and frequency scaling to match workload behavior to required performance levels – setting the voltage/frequency to the correct level to match performance needs provides the best energy efficiency. The advent of on-chip voltage regulators -- which our research shows has the potential to provide fast voltage transition times and per-core voltage control -- will greatly change the space of potential opportunities to apply DVFS. Our research explores these issues from a hardware/software perspective in the context of future multicore high-performance and embedded systems.

Research Objectives

  • Characterize alarm conditions in microprocessor
  • Develop new optimizations to mitigate alarm conditions
  • Framework for a collaborative hardware and software solution
  • Design hardware-level alarm sensors
  • Create new architectural techniques to pass information
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