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Assignment 1 due February 7
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(Solutions)
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Assignment 2 due February 21
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(Solutions)
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Assignment 3 due March 5
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(capdelay.hsp mentioned in problem 3 of the specification)
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(capdelayM.hsp attached to Mario's email message)
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Assignment 4 due March 12
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Final Project (document)
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Project — 16b Processor (slides)
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Project files (also available in /home/cs148/project on the course server):
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assembler (PHP executable)
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assembler-README (text)
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basic_test.asm (assembly code)
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basic_test.vcd (waveform dump)
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cosim.init (simulator initialization)
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example.asm (assembly code)
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inv.sp (spice code)
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Makefile (make script)
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multiply.vcd (waveform dump)
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project_cosim.v (Verilog code)
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project_skeleton.v (Verilog code)
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session.basic_test.vcd.vpd.tcl (Tcl code)
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test.info (signal format file)
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