Lecture 1: Overview: Design of VLSI Circuits and Systems
Lecture 2: Transistor and Wire RC Models
Lecture 3: Logic Gates
Lecture 4: Logical Effort
Lecture 5: Sequential Logic and Clocking  (2up)
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Lecture 6: Datapath Subsystems  (2up)
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Lecture 7: Memory Arrays  (2up)
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Lecture 8: VLSI Design Flow and Methodology
Lecture 9: Power
Lecture 10: Low Power Design
Lecture 11: Faster Wires and Clock Distribution
Lecture 12: Power Distribution, Packaging, and other Special-Purpose Subsystems
Lecture 13: Variations
Lecture 14: Design for Testability
Lecture 15: Future of ICs