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O =! Machine SUIF $ZMichael D. Smith Harvard University Division of Engineering and Applied Sciences June 2000[0d<[ BackgroundGoal: supply a compiler infrastructure for machine-specific optimizations profile-driven optimizations architectural investigations History: previous version supported research in computer architecture feedback-directed optimization branch prediction code layout and branch alignment global instruction scheduling program instrumentation register allocation systems for run-time optimizationt+Z05i6+Z05i6/%Infrastructure Criteria Should be easy to use and extend Should meet the needs of a range of users Should support multiple, disparate targets Should accommodate a variety of substrates!*++!*+ + CustomersThose interested in building new optimizations done without detailed knowledge of target machine underlying substrate implementation written as a  parameterized pass adding support for a new target architecture or augmenting an existing architecture developing a new IR implementation but uninterested in rewriting the optimizations$3#-(#0$3# - (#0Typical Backend Flow Infrastructure Overviewv Analysis libraries and optimization passes Target libraries IR definition and mapping library Substrate systemX+dn"dnw Code Example// Spill source operand i of instruction at h in n, // inserting a register-load just before h. void spill_src(InstrHandle h, int i, CfgNode* n) { Instr* mi = *h; Opnd opnd = get_src(mi, i); TypeId t = get_type(opnd); // replace operand by virtual register Opnd vr = opnd_reg(t); set_src(mi, i, vr); // load spilled value before original instruction Instr* ld = new_instr_alm(vr, load_opcode(t), opnd); insert_before(n, h, ld); }hdo     6F   Target ParameterizationAnalysis/optimization passes written without direct encoding of target details Target details encapsulated in OPI functions and data structures Machine-SUIF passes work without modification on disparate targets@dCdC!$Supporting Architectural ExperimentsExample: add prefetch instruction to existing architecture goal: small architectural change small code change Steps: add an interface library defines new OPI functions, e.g. bool is_prefetch(Instr*) can now code optimizations requiring new functions add one or more implementation libraries implement new OPI functions for particular target extend existing OPI functions for new instr, e.g. bool reads_memory(Instr*) can now run optimizations for that target;:m);$  !3   d*$!Interface Library (prefetch) ,#Implementation Library (x86pf)" Substrate IndependenceGOptimizations, analyses, and target libraries are substrate-independentHdHContents of Current ReleaseHInterface libraries machine (basic IR types, code finalization, assembly language and C printing), code generation control flow graph, control flow analysis, bit vector dataflow instrumentation (block, branch, load/store) Target libraries Compaq Alpha, Intel x86, suifvm Optimization passes common subexpression elim., dead code elim., peephole graph-coloring register allocation Converters s2m, il2cfg, cfg2il, m2a, m2c Documentation (in noweb) overview, user s guide, extender s guide, cookbook implementation documents for each interface library Y g Y   g.$Contents of Next ReleaseInterface libraries static single assignment (SSA) register allocation instruction scheduling Optimization passes copy propagation loop-invariant code motion procedure inlining superblock and basic block scheduling Other debugging support using stabstJeJe Preview of Afternoon SessionOutline: getting started understanding the structure of an optimization pass writing and running an optimization pass building a new target library extending an existing target library inserting instrumentation CD-ROM with sources and executables available6 . .Supporting CastStudents and technical staff Glenn Holloway, Erven Rohou Deborah Abel, Ramy Adeeb, Gang Chen, Allyn Dimock, Kathleen Durant, Eric Feigin, Nick Gloy, Juraj Hlavac, Adon Hwang, Russ Ross, Stuart Schechter, Jason Simmons, Vijak Sethaput, Omri Traub, Dario Vlah, Dave Walker, Cliff Young, Conan Yuan Research homepage http://www.eecs.harvard.edu/machsuif Supporting institutions DARPA, NSF AMD, Compaq/Digital, HP, IBM, Intel, Microsoftx &: &: /(*+,#-%.&/'0(1)2*3041526( ` ̙33` ` ff3333f` 333MMM` f` f` 3>?" dd?" d d. " U n?" dd@   @@``PR  A   ` p>> RJ (    Tՙ ``  T Click to edit Master title style! !4  N@ ```p  RClick to edit Master text styles Second level Third level Fourth level Fifth level!     S  NL ``  z* AA^B  6DԔ``H  0nv ? ̙33 $Blank Presentation 0 @8(     NHkk x%   v* J%%JJpp  NXYkk  >%  x* J%%JJppd  c $ ?,J  4  NYkk  L'  RClick to edit Master text styles Second level Third level Fourth level Fifth level!     S  T`kk x   v* J%%JJpp  TFkk  >  x* J%%JJppH  0kw ? ̙338 P<(  < < Ntgg "   x* D""DDff < Ngg  6"  z* D""DDff < T\gg    x* D""DDff < Tɐgg  6  z* D""DDffH < 0kw ? ̙33      9(  l  C  6`  l  C 6      <l-En >    <X E  m9 Copyright by Michael D. Smith 2000 All rights reserved.::   S ^A@WM:\smith\paper\talk\veritas.jpg< x H  0nv ? ̙33  `(  mn l  C ѐ``   l  C @Ґ```p  H  0nv ? ̙33ff 4 $(  r  S Ð``   r  S ```p  H  0nv ? ̙33 * (  l  C ``   l  C  ```p  H  0nv ? ̙33 + 804N$ (  l  C (``   H8 P`@ N`P@" G TLX? Pp > 2  Ho? PP X Elower$rB   BDo P P `2  0  fB  6D   2  H#o? P`P ( Hoptimize$ rB  BDo P XP `2  H(o? P0P  Grealize$rB  BDo P (P 02  H,o? P P  Hoptimize$ rB  BDo P P 2 ! HT1o? P P  Hfinalize$ rB " BDo P P 2 & H5o? P P h Flayout$rB ' BDo P P 2 + H:o? PpP 8 Foutput$rB , BDo P hP prB / BDo P 8P @*T ` 0 2#   `2  0`  PfB  6D ((`2  0`  fB  6D `2  0`  fB  6D  `2 # 0` x  fB $ 6D  `2 ( 0` H  fB ) 6D h h `2 - 0`  `fB . 6D 88Z2 0 s *`  0`B 1 0D  3 TZGH?[Io    4 TZGH?[Io   (l2 < <?  `l2 = <?  l2 > <?  0  l2 ? <?  `  l2 A <?  `  l2 B <?  `  E N$n?  ,h OObject, assembly, or C code F NpI?  `G JSUIF intermediate form I TT? Yi o;Parameter bindings from dynamically-linked target libraries<<T@    M  ~ K NjJ? Fp~ L NjJ? O   C N@z? +T P  T Machine-SUIF IR for real machine!! D N"z? \ r b.Machine-SUIF IR for idealized machine (suifvm)//H  0nv ?34<=>?AB ̙33 .  :,k(  ,l , C  /z``  z r , S /z` 0 p z E8 0 t :, D , HH7zjJ?r? 7yfc  , H`2zjJ?r ? <yfc mlib   , H=zjJ?r ?  = alpha lib   , HAzjJ?0  8suif , H(EzjJ?0  A machsuif mlib , H0 suifvm lib   , H$zjJ?    :libcfg , H8zjJ?t 8deco , HzjJ? t = deco mlib   , HzjJ? t  ;x86 lib-@ 0 t   ,0 Q t8  , Hz?    9 opi B , ZDԔ?0  B , ZDԔ? t L@ 0 t  &,0 V t=  ", NL z?.w  F parameterization B #,  `DԔ?0 b .b B $,  `DԔ?wb tb  *, HzjJ?  ;libutil +, HHzjJ?. :libbvd ,, HzjJ?  7dce -, HzjJ?r 7cse ., HXXzjJ? :layoutb 5,  fG0*H`xInjJ?fb 6,B  fG0*HIxjJ?fb 7,  fG0*H0libcfg @ N9xjJ?{  ?libutil @ N|;xjJ? n >libbvd @ N>xjJ?]  ;dce @ NBxjJ?B ;cse @ N`ExjJ?w >layoutb @ # lG0*H`xInjJ?6b @B # lG0*HIxjJ?6b @ # lG0*H0libcfg X@ TYxjJ?{  ?libutil Y@ Td]xjJ? n >libbvd Z@ TDaxjJ?]  ;dce [@ TLdxjJ?B ;cse \@ TgxjJ?w >layoutb ]@  fG0*H`xInjJ?6b ^@B  fG0*HIxjJ?6b _@  fG0*H0 ,$ 0 J parameterization  @ H,oxjJ?x E  ;x86 lib l  H  @ H ,$D  0 d@ ZrxjJ? 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B g@ ZDԔ?G D SN ]   h@ ]   i@ TwxjJ?   >libcfg j@ Tx{xjJ?{  ?libutil k@ T~xjJ? n >libbvd l@ T؂xjJ?]  ;dce m@ TxjJ?B ;cse n@ TxjJ?w >layoutb o@  fG0*H`xInjJ?6b p@B  fG0*HIxjJ?6b q@  fG0*H0 ,$ 0 J parameterization  @ ZxjJ? { H  ?x86 lib @ N suifvm lib    @ NhxjJ?wD 8deco @ N@%T(  Tl T C  x``  x l "T C x`` x 8 zP %Tz T N$l"jJ?P > x86_pf lib   #T Hm"jJ?zHP ;x86 lib $T Tq" jJ?g$ ?+"H T 0nv ? ̙33 0 {` l( .5%^ ll l C t"``  "  l T" jJ?at <  l Tl" 1?h   ]+#ifndef PREFETCH_PREFETCH_H #define PREFETCH_PREFETCH_H #include class PrefetchContext { public: virtual ~PrefetchContext() { } virtual bool is_prefetch(Instr*); }; bool is_prefetch(Instr*); extern "C" void init_prefetch(SuifEnv*); #endif /* PREFETCH_PREFETCH_H */,, l Th" 1?&  2#include "prefetch.h" bool PrefetchContext::is_prefetch(Instr *instr) { return dynamic_cast(the_context) ->is_prefetch(instr); } extern "C" void init_prefetch(SuifEnv* suif_env) { init_machine(suif_env); }"H l 0nv ? ̙33  6 3 +  (  l  C "``  " +  T߸ 1?"  i#include "x86pf.h" bool PrefetchContextX86Pf::is_prefetch(Instr* mi) { return (get_opcode(mi) == xo_prefetch); } bool MachineContextX86Pf::reads_memory(Instr* mi) { if (is_prefetch(mi)) return true; return MachineContextX86::reads_memory(mi); } class CodeGenX86Pf : public CodeGenX86 { protected: virtual void translate_any(Instr* mi, InstrList* l) { OneNote n = take_note(mi, k_instr_opcode); if (n.get_value() == "prefetch") { /* generate instruction */ } else CodeGenX86::translate_any(mi, l); }; }; CodeGen* SuifVmContextX86Pf::target_code_gen() const { if (cached_code_gen) return cached_code_gen; cached_code_gen = new CodeGenX86Pf; return cached_code_gen; } class PrinterX86Pf : public PrinterX86 { protected: virtual void print_instr_alm(Instr* mi) { if (is_prefetch(mi)) { /* print it */ } else PrinterX86::print_instr_alm(mi); } }; Printer* MachineContextX86Pf::target_printer() const { if (cached_printer) return cached_printer; cached_printer = new PrinterX86Pf; return cached_printer; } Context* context_creator_x86pf() { return new X86PfContext; } extern "C" void init_x86pf(SuifEnv* suif_env) { init_x86(suif_env); init_prefetch(suif_env); k_x86pf = "x86pf"; the_context_creator_registry[k_x86pf] = context_creator_x86pf; }"ji  Tl~" 1?~`  `"#ifndef X86PF_X86PF_H #define X86PF_X86PF_H #include #include const int xo_prefetch = LAST_X86_OPCODE + 1; #undef LAST_X86_OPCODE #define LAST_X86_OPCODE xo_prefetch class PrefetchContextX86Pf : public PrefetchContext { public: bool is_prefetch(Instr*); }; class MachineContextX86Pf : public MachineContextX86 { public: bool reads_memory(Instr*); Printer* target_printer() const; }; class SuifVmContextX86Pf : public SuifVmContextX86{ public: CodeGen* target_code_gen() const; }; class X86PfContext : public virtual Context, public virtual MachineContextX86Pf, public virtual PrefetchContextX86Pf, public virtual SuifVmContextX86Pf { }; extern "C" void init_x86pf(SuifEnv*); extern IdString k_x86pf; #endif /* X86PF_X86PF_H */"#"H  0nv ? ̙33& 1 %%5GXp$( @ Xl * / 8X* /,$D 0 5X Z"jJ?/ >  4X Z"jJ?l >  3X ZP"jJ?N  > T @  (X# *   X Zr"jJ?@   <suif  X Z$y"jJ?@  E machsuif mlib9L 0 t  X# Q * n8  X HW"?    9 opi B X ZDԔ?0  B X ZDԔ? t FL 0 t  X# V * n=  X H}"?.w  F parameterization B X ZDԔ?0 b .b B X ZDԔ?wb tb  X N8"jJ? l9  = alpha lib    X N "jJ? *   > suifvm lib   X N["jJ? n  ;x86 lib  X N\"jJ?   :libcfg X N`d"jJ?  ;libutil X N4h"jJ?( :libbvdl N /   9X T"jJ?l >  7X T*"jJ?/ > l   DX ,$D 0 T w D 'X#  n  X ZO"jJ?wD <deco X ZT""jJ?w D A deco mlib  T N / ?X# N / ;X Td"jJ?N  >  =X T"jJ?l >  >X TK"jJ?/ > T@  = Q  CX = Q ~ AX NjJ? = <Q ~ BX NjJ?v= Q  X N"jJ?l  7dce X N 6"jJ? 7cse X N4*"jJ? :layoutb X # lG0*H`xInjJ?`b X@ # lG0*HIxjJ?`b X # lG0*H0( Kw0w0  DR D 3 ,J   x D C xx L'  x L8From the last slide, you can see that & . If we load the Alpha library, we get an Alpha compiler. If we instead load the x86 library, we get an x86 compiler.H D 0kw ? ̙33 0 {sd (  dR d 3 ,J   xy d C Xx L'  x Intro example. Types--identify the abstractions that we uses in machine-specific compilation--e.g., instructions, operands, and handles on entries in an instruction list. We often use a functional interface to manipulate the elements of the IR. These functions hide the details of the underlying substrate and the current target machine. You can think of these functions as parameters to the optimization pass. Most are bound statically (blue). Target-dependent functions bound dynamically in Machine SUIF (green).H d 0kw ? ̙33 0 pH( | pR p 3 ,J   z p C ܲx L'  z VBFour pieces and two separations. Top to bottom, and then OPI as the interface that encapsulates the specifics of the target and substrate. OPI is a programming interface, not a substrate. Relies on a substrate to provide things like symbol tables, storage management, intermediate file I/O, and the pipelining of the compiler passes. It includes data structures for implementing an IR as well as functions for creating, inspecting, and manipulating these IR objects. Parameterization encapsulates target specifics. Let s look at some examples.H p 0kw ? ̙33Y 0 Pt( `p  tR t 3 ,J   " t C (" L'  " Although the OPI relies heavily on a functional interface, we do use object-oriented techniques in the implementation of Machine SUIF. In particular, we use these OO techniques to make it easy to combine and refine the target libraries. On the other hand, the functional interface makes it feasible to port the OPI to an optimization setting where efficiency (and not extensibility) matters. E.g., systems for run-time optimization. So, how small is small? Following is code for this example; missing only the specific details of how to build and print it (typically less than 10 lines of additional code). More details this afternoon and in the documents in front of you.H t 0kw ? ̙33! 0 xpx( }@u@ xR x 3 ,J   "~ x C " L'  "  H x 0kw ? ̙33  0 \T|( }@u@ |R | 3 ,J   "Z | C ,ܸ L'  " Machine SUIF is a real compiler built on top of SUIF. Most of the code in the Machine-SUIF distribution is independent of SUIF however. By rewriting the mapping and IR libraries and the wrappers around the OPI passes, you could quickly build a new compiler built on a different substrate your favorite compiler. This is what we have done in some of our work under the Deco project at Harvard. The project is interested in algorithms and techniques for on-line optimization systems. In our first Deco prototype, we were able to share optimizations with Machine SUIF since both implemented the same OPI. The Deco prototype simply statically bound the target-specific OPI functions since we were interested in efficiency and only a single target machine.H | 0kw ? ̙33 0 B( (@R@ R  3 ,J     C 8 L'   P<State how much of SPEC95 runs. State that we pass PGI tests.H  0kw ? ̙33 0 x(  R  3 ,J   ~  C  L'    H  0kw ? ̙33% 0 h`(  X  C ,J   `  S  L'   If not simple, I won t be able to use it. Few code examples to illustrate this. More about intended audience on next slide. Easy to retarget. Support architecture research. substrate = software system on top of which our infrastructure is built Optimization is not the sole domain of the compiler anymore. Systems for dynamic optimization becoming increasingly important.H  0kw ? ̙33^$ 0 (  X  C ,J     S  L'   We re very happy with the system and intend to keep using it and extending it.H  0kw ? ̙33# 0 (  X  C ,J   "  S <" L'  "  H  0kw ? ̙33r0N.c@VCge3]w&Plk!P?(+f.!15;?AkIeK,y.P#i-MQCTV2 Oh+'0Tx ,8 X d p | Machine SUIFoOverview of Machine SUIFiMichael D. Smithne -C:\msoffice\Templates\Blank Presentation.potoweMichael D. Smithate453Microsoft PowerPoint\Bl@0>r@I {@`no@_!1;]G0S  )(& &&#TNPPD2OMi & TNPP &&TNPP     (A |(|ʦ """)))UUUMMMBBB999|PP3f3333f333ff3fffff3f3f̙f3333f3333333333f3333333f3f33ff3f3f3f3333f3333333f3̙33333f333ff3ffffff3f33f3ff3f3f3ffff3fffffffff3fffffff3f̙ffff3ff333f3ff33fff33f3ff̙3f3f3333f333ff3fffff̙̙3̙f̙̙̙3f̙3f3f3333f333ff3fffff3f3f̙3ffffffffff!___wwwtKKKKKnsKmJEEJnQQnEEEmosmJhnnIs$n$sJnEnnnE?sslrhEEEEEnKmnnKKnnnmmEnDssEEEEEEEDDJnnDn "--&TNPP & ՜.+,0     $CustomHarvard Universityi Times New RomanComic Sans MSArial Courier NewSymbolBlank Presentation Machine SUIF BackgroundInfrastructure Criteria CustomersTypical Backend FlowInfrastructure Overview Code ExampleTarget Parameterization%Supporting Architectural ExperimentsInterface Library (prefetch)Implementation Library (x86pf)Substrate IndependenceContents of Current ReleaseContents of Next ReleasePreview of Afternoon SessionSupporting Cast  Fonts UsedDesign Template Slide Titles(_VMichael D. SmithMichael D. Smith  !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~Root EntrydO)PicturesCurrent UserSummaryInformation(TPowerPoint Document( VDocumentSummaryInformation8