Advanced Computer Architecture

Fall 2003


David Brooks

Assistant Professor

Maxwell Dworkin 141
33 Oxford Street
Cambridge MA 02138

Phone: 617-495-3989
Fax: 617-495-2809

E-mail: dbrooks@eecs.harvard.edu


Course Readings

Related Course


CS 146: 

Computer Architecture

[Spring '04]


The course will focus on the broad topic of low-power computer systems.  We'll look at environments ranging from high-performance enterprise systems down to extremely low power mobile and sensor applications with budgets in the 10s of mWs.  This will be a seminar-style course.   The class is expected to discuss and interact after reading the assigned papers.  Most of the course grade will be based on class participation and a course project.

Tentative Topics

Introduction to Power-Aware Computing

Chip/Architectural Level Power Modeling

Software/OS Level Power Modeling/Measurement

Chip and System Level Temperature Modeling

Newer Trends in Power-Aware Computing (di/dt, reliability,
ultra-low-power computing, etc)

Architectural, Compiler, and O/S Techniques to reduce

Chip/hardware level techniques

OS/Compiler/Software technique

Energy management in mobile/wireless environments

Energy management in hosting centers


CS146 (Computer Architecture, or equivalent,) is not required.  However, knowledge of CS141 (Computing Hardware -- i.e. Basic Digital Logic/Simple Microprocessors) is. It would help if students have taken a junior/senior-level course in any one of Computer Architecture, Operating Systems, Compilers, or VLSI.

Course Requirements

As the course is a organized in discussion format, the major requirements are that you attend class and actively participate in the discussions.  There is a major course project at the end of the semester in the area of power-aware computer systems.  Last semester (Spring 2003) some of the projects included:

Measuring/analyzing power/temperature for various workloads on a Pentium4 and an XBOX system

Investigating architectural slack between instructions and dynamic policies to exploit slack for low-power execution

Developing process/technology invariant circuit-level power models and

Looking at dynamic compiler/architectural interactions for di/dt control

Investigating the availability of bit-narrow operations in a compiler
for low-power execution

Course Readings

First Week Readings:

Lecture Notes Monday 9/15/2003.

D. Brooks, P. Bose, S. Schuster, H. Jacobson, P. Kudva, A. Buyuktosunoglu, J.D. Wellman, V. Zyuban, M. Gupta, and P. Cook. "Power-Aware Microarchitecture: Design and Modeling Challenges for Next-Generation Microprocessors,"  IEEE Micro, Nov/Dec, 2000.

"Power: A First-Class Architectural Design Constraint,"  T. Mudge, IEEE Computer, 2001.

Information Technology and Resource Use.

Second Week Readings:

David Brooks, Vivek Tiwari, and Margaret Martonosi. "Wattch: A Framework for Architectural-Level Power Analysis and Optimizations,"  27th International Symposium on Computer Architecture (ISCA), Vancouver, British Columbia, June 2000.

Third Week Readings (Sept. 29):

Canturk Isci, Margaret Martonosi. "Run-time Power Monitoring and Estimation in High-Performance Processors: Methodology and Experiences,"  MICRO-36, Dec. 2003.

V. Tiwari, S. Malik, A. Wolfe, and T.C. Lee.  "Instruction Level Power Analysis and Optimization of Software,"  Journal of VLSI Signal Processing Systems, Vol. 13, No. 2, August 1996 (ps file).

Third Week Readings (Oct. 1):

J. Flinn and M. Satyanarayanan ,"PowerScope: A Tool for Profiling the Energy Usage of Mobile Applications," Second IEEE Workshop on Mobile Computing Systems and Applications.

W. R. Hamburgen, D. A. Wallach, M. A. Viredaz, L. S. Brakmo, C. A. Waldspurger, J. F. Bartlett, T. Mann, K. I. Farkas, "Itsy: Stretching the Bounds of Mobile Computing," IEEE Computer, April 2001, pp 28-36.

K. Farkas, J. Flinn, G. Back, D. Grunwald, J. Anderson, "Quantifying the Energy Consumption of a Pocket Computer and a Java Virtual Machine", WRL Tech Report 2000/5 (also appeared in ACM SIGMETRICS 2000).

Fourth Week Readings (Oct. 6):

Intel Pentium 4 Thermal Guidelines (Skim Sections 1 - 7, Read Section 8).

Skadron, M. R. Stan, W. Huang, S. Velusamy, K Sankaranarayanan, and D. Tarjan. “Temperature-Aware Microarchitecture,” Proceedings of the 30th International Symposium on Computer Architecture, June 2003.

Fourth Week Readings (Oct. 8):

E. Grochowski, D. Ayers, and V. Tiwari.  "Microarchitectural Simulation and Control of di/dt-induced Power Supply Voltage," The International Symposium on High Performance Computer Architecture (HPCA), February 2002.

R. Joseph, D. Brooks, and M. Martonosi.  "Control Techniques to Eliminate Voltage Emergencies in High Performance Processors," The International Symposium on High Performance Computer Architecture (HPCA), February 2003.

Fifth Week Readings (Oct. 15):

Stefanos Kaxiras, Zhigang Hu, Margaret Martonosi. "Cache Decay: Exploiting Generational Behaviour to Reduce Cache Leakage Power," the 28th International Symposium on Computer Architecture. June, 2001.

N. Kim, K. Flautner, D. Blaauw, and T. Mudge.  "Drowsy instruction caches: Leakage power reduction using dynamic voltage scaling and cache sub-bank prediction," 35th Ann. IEEE/ACM Symp. Microarchitecture (MICRO-35), pp. 219-230, Nov. 2002.

Sixth Week Readings (Oct. 22):

S. Dropsho, V. Kursun, D.H. Albonesi, S. Dwarkadas, and E.G. Friedman.  "Managing Static Leakage Energy in Microprocessor Functional Units," the 35th International Symposium on Microarchitecture, pp. 321-332, November 2002.

Lawrence T. Clark, Neil Deutscher, Shay Demmons, Franco Ricci.  "Standby power management for a 0.18µm microprocessor, " Proceedings of the 2002 international symposium on Low power electronics and design , August 2002.

Sixth Week Readings (Oct. 24):

S. Park, A. Savvides and M. B. Srivastava, "Battery Capacity Measurement and Analysis Using Lithium Coin Cell Battery," Proceedings of International Symposium on Low power Electronics and Design (ISLPED 2001), Huntington Beach CA, August 2001.

K. Lahiri, A. Raghunathan, S. Dey, and D. Panigrahi, "Battery-driven system design: A new frontier in low power design," Asia South Pacific Design Automation Conference (ASP-DAC) / International Conference on VLSI Design , January 2002.

Seventh Week Readings (Oct. 27):

Jacob R. Lorch , Alan Jay Smith, "Improving dynamic voltage scaling algorithms with PACE," Proceedings of the 2001 ACM SIGMETRICS international conference on Measurement and modeling of computer systems, p.50-61, June 2001.

Grunwald, Morrey, Levis, Neufield, Farkas, "Policies for Dynamic Clock Scheduling," OSDI 2000.

Seventh Week Readings (Oct. 29):

John Zedlewski, Sumeet Sobti, Nitin Garg, Fengzhou Zheng, Arvind Krishnamurthy, and Randolph Wang, "Modeling Hard Disk Power Consumption," Usenix Conference on File and Storage Technologies, March 2003. 

Sudhanva Gurumurthi, Anand Sivasubramaniam, and Mahmut Kandemir, Penn State University; Hubertus Franke, IBM T.J. Watson Research Center, "DRPM: Dynamic Speed Control for Power Management in Server Class Disks," International Symposium on Computer Architecture, June 2003.

Eighth Week Readings (Nov. 3):

Jeff Chase, Darrell Anderson, Prachi Thakar, Amin Vahdat, and Ron Doyle, "Managing Energy and Server Resources in Hosting Centers," 18th Symposium on Operating Systems Principles (SOSP), October 2001.

Mootaz Elnozahy, Michael Kistler, Ramakrishnan Rajamony, "Energy Conservation Policies for Web Servers," Proceedings of the 4th USENIX Symposium on Internet Technologies and Systems, March 2003.

Eighth Week Readings (Nov. 5):

H. Zeng, X. Fan, C. Ellis, A. Lebeck, and A. Vahdat, "ECOSystem: Managing Energy as a First Class Operating System Resource,"  Proceedings of ASPLOS 2002, Oct. 2002.

Jason Flinn and M. Satyanarayanan, "Energy-Aware Adaptation for Mobile Applications," Proceedings of the 17th ACM Symposium on Operating Systems Principles (SOSP), Dec. 1999.

Ninth Week Readings (Nov. 10):

Victor Zyuban and Philip N. Strenski, "Unified Methodology for Resolving Power-Performance Tradeoffs at the Microarchitectural and Circuit Levels," Proceedings of the 2002 International Symposium on Lower Power Electronics and Design (ISLPED),  New York, ACM. 2002, p.166-71, August 2002.

Viji Srinivasan, David Brooks, Michael Gschwind, Pradip Bose, Victor Zyuban, Philip N Strenski, and Philip G Emma, "Optimizing Pipelines for Power and Performance," 35th International Symposium on Microarchitecture (MICRO-35), November, 2002.

Ninth Week Readings (Nov. 12):

Jason Hill's Thesis, Chapter 6.

F. Koushanfar, A. Davare, D. T. Nguyen, M. Potkonjak, A. Sangiovanni-Vincentelli, "Low power coordination in wireless ad-hoc networks," Proceedings of the 2003 International Symposium on Lower Power Electronics and Design (ISLPED).

Tenth Week Readings (Nov. 17):

C-H. Hsu and U. Kremer, "The Design, Implementation, and Evaluation of a Compiler Algorithm for CPU Energy Reduction," ACM SIGPLAN Conference on Programming Languages, Design, and Implementation (PLDI'03), San Diego, CA, June 2003.

Taliver Heath, Eduardo Pinheiro, Jerry Hom, Ulrich Kremer, Ricardo Bianchini, "Application Transformations for Energy and Performance-Aware Device Management," PACT 2002.

Tenth Week Readings (Nov. 19):

A. Iyer and D. Marculescu, "Power-Performance Evaluation of Globally Asynchronous, Locally Synchronous Processors," Proceedings of the 29th International Symposium on Computer Architecture (ISCA), Anchorage, AK, May 2002.

G. Magklis, M.L. Scott, G. Semeraro, D.H. Albonesi, and S. Dropsho, "Profile-based Dynamic Voltage and Frequency Scaling for a Multiple Clock Domain Microprocessor,"  Proceedings of the 30th International Symposium on Computer Architecture (ISCA), pp. 14-25, June 2003.

Eleventh Week Readings (Nov. 24):

V.Stojanovic and V.G. Oklobdzija, "Comaparative Analysis of Master-Slave Latches and Flip-Flops for High-Performance and Low-Power VLSI Systems," IEEE Journal of Solid-State Circuits, Vol.34, No.4, April 1999.

Vojin G. Oklobdzija, Bart R. Zeydel, Hoang Dao, Sanu Mathew, Ram Krishnamurthy,"Energy-Delay Estimation Technique for High-Performance Microprocessor VLSI Adders," Proceedings of the International Symposium on Computer Arithmetic, ARITH-16, Santiago de Compostela, SPAIN, June 15-18, 2003.

Twelfth Week Readings (Dec. 1):

 S. Banerjee and A. Misra, "Minimum Energy Paths for Reliable Communication in Multi-hop Wireless Networks," CS-TR 4315, Technical Report, Department of Computer Science, University of Maryland, College Park, December 2001.

Yu, Govindan, and Estrin, "Geographical and Energy Aware Routing: a recursive data dissemination protocol for wireless sensor networks," 2001.

Thirteenth Week Readings (Dec. 8):

T. Starner, "Human Powered Computing," IBM Systems Journal 1996.

P. Chapman, "Biomechanical Energy Conversion:  Challenges in Power Electronics and Electromechanics."

N. Kamijoh, T. Inoue, C. M. Olsen, M.T. Raghunath, C. Narayanaswami, "Energy trade-offs in the IBM Wristwatch computer," International Symposium on Wearable Computers, 2001.

C. Michael Olsen, L. Alex Morrow, "Multi-processor Computer System Having Low Power Consumption," Second International Workshop on Power-Aware Computer Systems, Cambridge, MA, USA, February 2, 2002.

Thirteenth Week Readings (Dec. 10):

S. Gochman, R. Ronen, I. Anati, A. Berkovits, T. Kurts, A. Naveh, A. Saeed, Z. Sperber, and R. Valentine, "The Intel® Pentium® M Processor: Microarchitecture and Performance," Intel Technology Journal. May 2003.

D. Genossar, and N. Shamir, "Intel® Pentium® M Processor Power Estimation, Budgeting, Optimization, and Validation," Intel Technology Journal. May 2003.

L.T. Clark, E.J. Hoffman, J. Miller, M. Biyani, Y. Liao, S. Strazdus, M. Morrow, K.E. Velarde, and M.A. Yarch, "An embedded 32-bit Microprocessor Core for Low-Power and High-Performance
Applications," IEEE Journal of Solid-States Circuits, Nov. 2001.

Thirteenth Week Readings (Dec. 12):

C. J. Hughes, J. Srinivasan, and S. V. Adve, "Saving Energy with Architectural and Frequency Adaptations for Multimedia
Applications," Proceedings of the 34th International Symposium on Microarchitecture (MICRO-34), December 2001.

A. Buyuktosunoglu, T. Karkhanis, D. H. Albonesi, P. Bose, "Energy Efficient Co-Adaptive Instruction Fetch and Issue," International Symposium on Computer Architecture, June 2003 (ps files).