CS246

Advanced Computer Architecture

Fall 2004

 

David Brooks

Assistant Professor

Maxwell Dworkin 141
33 Oxford Street
Cambridge MA 02138

Phone: 617-495-3989
Fax: 617-495-2809

E-mail: dbrooks@eecs.harvard.edu

Syllabus

Course Readings

Related Course


CS 146:

Computer Architecture

[Spring]


Previous Course


CS 246:

Advanced Computer Architecture

[Fall'03]

Introduction

The course will focus on the broad topic of low-power computer systems.  We'll look at environments ranging from high-performance enterprise systems down to extremely low power mobile and sensor applications with budgets in the 10s of mWs.  This will be a seminar-style course.   The class is expected to discuss and interact after reading the assigned papers.  Most of the course grade will be based on class participation and a course project.

Tentative Topics

Introduction to Power-Aware Computing

Chip/Architectural Level Power Modeling

Software/OS Level Power Modeling/Measurement

Chip and System Level Temperature Modeling

Newer Trends in Power-Aware Computing (di/dt, reliability,
ultra-low-power computing, etc)

Architectural, Compiler, and O/S Techniques to reduce
power/temperature/etc

Chip/hardware level techniques

OS/Compiler/Software technique

Energy management in mobile/wireless environments

Energy management in hosting centers

Prerequisites

CS146 (Computer Architecture, or equivalent,) is not required.  However, knowledge of CS141 (Computing Hardware -- i.e. Basic Digital Logic/Simple Microprocessors) is. It would help if students have taken a junior/senior-level course in any one of Computer Architecture, Operating Systems, Compilers, or VLSI.

Course Requirements

As the course is a organized in discussion format, the major requirements are that you attend class and actively participate in the discussions.  There is a major course project at the end of the semester in the area of power-aware computer systems.  Last semester (Fall 2003) some of the projects included:

Measuring/analyzing power/temperature for various workloads on a Pentium4 and an XBOX system

Investigating architectural slack between instructions and dynamic policies to exploit slack for low-power execution

Developing process/technology invariant circuit-level power models and
metrics

Looking at dynamic compiler/architectural interactions for di/dt control

Investigating the availability of bit-narrow operations in a compiler
for low-power execution

Course Readings

First Week Readings:

Lecture Notes Monday 9/20/2004.

D. Brooks, P. Bose, S. Schuster, H. Jacobson, P. Kudva, A. Buyuktosunoglu, J.D. Wellman, V. Zyuban, M. Gupta, and P. Cook. "Power-Aware Microarchitecture: Design and Modeling Challenges for Next-Generation Microprocessors," IEEE Micro, Nov/Dec, 2000.

T. Mudge, "Power: A First-Class Architectural Design Constraint," IEEE Computer, 2001.

Information Technology and Resource Use.

Lecture Notes Wednesday 09/22/04

Monday (9/27/04):

David Brooks, Vivek Tiwari, and Margaret Martonosi. "Wattch: A Framework for Architectural-Level Power Analysis and Optimizations,"  27th International Symposium on Computer Architecture (ISCA), Vancouver, British Columbia, June 2000.

Lecture Notes

Wednesday (9/29/04):

Canturk Isci, Margaret Martonosi, "Run-time Power Monitoring and Estimation in High-Performance Processors: Methodology and Experiences," MICRO-36, Dec. 2003.

Tao Li and Lizy John, " Run-time Modeling and Estimation of Operating System Power Consumption," SIGMETRICS 2003.

Lecture Notes

Monday (10/04/04):

W. R. Hamburgen, D. A. Wallach, M. A. Viredaz, L. S. Brakmo, C. A. Waldspurger, J. F. Bartlett, T. Mann, K. I. Farkas, "Itsy: Stretching the Bounds of Mobile Computing," IEEE Computer, April 2001, pp 28-36.

K. Farkas, J. Flinn, G. Back, D. Grunwald, J. Anderson, "Quantifying the Energy Consumption of a Pocket Computer and a Java Virtual Machine", WRL Tech Report 2000/5 (also appeared in ACM SIGMETRICS 2000)

Lecture Notes

Wednesday (10/06/04):

K. Skadron, M.R. Stan, W. Huang, S. Velusamy, K. Sankaranarayanan, and D. Tarjan, "Temperature-Aware Computer Systems: Opportunities and Challenges." IEEE Micro, 23(6), Nov-Dec. 2003

Intel Pentium 4 Thermal Guidelines (Skim Sections 1 - 7, Read Section 8).

Lecture Notes

Wednesday (10/13/04):

E. Grochowski, D. Ayers, and V. Tiwari,"Microarchitectural Simulation and Control of di/dt-induced Power Supply Voltage," The International Symposium on High Performance Computer Architecture (HPCA), February 2002.

R. Joseph, D. Brooks, and M. Martonosi,"Control Techniques to Eliminate Voltage Emergencies in High Performance Processors," The International Symposium on High Performance Computer Architecture (HPCA), February 2003.

Lecture Notes

Monday (10/18/04)

Stefanos Kaxiras, Zhigang Hu, and Margaret Martonosi, "Cache Decay: Exploiting Generational Behaviour to Reduce Cache Leakage Power," the 28th International Symposium on Computer Architecture. June, 2001.

N.S. Kim, T. Austin, D. Blaauw, T. Mudge, K. Flautner, J.S. Hu, M.J. Irwin, M. Kandemir, and V. Narayanan, "Leakage Current: Moore's Law Meets Static Power," Computer, vol. 36, no. 12, Dec. 2003.

Wednesday (10/20/04):

S. Dropsho, V. Kursun, D.H. Albonesi, S. Dwarkadas, and E.G. Friedman, "Managing Static Leakage Energy in Microprocessor Functional Units," the 35th International Symposium on Microarchitecture, pp. 321-332, November 2002.

S. Rele, S. Pande, S. Onder, and R. Gupta, "Optimizing static power dissipation by functional units in superscalar processors," Proceedings of the 11th International Conference on Compiler Construction(CC'02), Grenoble, France, Apr 2002 (pdf), (ps).

Monday (10/25/04):

S. Park, A. Savvides and M. B. Srivastava, "Battery Capacity Measurement and Analysis Using Lithium Coin Cell Battery," Proceedings of International Symposium on Low power Electronics and Design (ISLPED 2001), Huntington Beach CA, August 2001.

K. Lahiri, A. Raghunathan, S. Dey, and D. Panigrahi, "Battery-driven system design: A new frontier in low power design," Asia South Pacific Design Automation Conference (ASP-DAC) / International Conference on VLSI Design , January 2002.

Wednesday (10/27/04):

T. Heath, E. Pinheiro, J. Hom, U. Kremer, and R. Bianchini, "Code Transformations for Energy-Efficient Device Management," IEEE Transactions on Computers, volume 53, number 8, August 2004.

C-H. Hsu and U. Kremer, "The Design, Implementation, and Evaluation of a Compiler Algorithm for CPU Energy Reduction," ACM SIGPLAN Conference on Programming Languages, Design, and Implementation (PLDI'03), San Diego,CA, June 2003. (ps).

Monday (11/01/04):

K. Flautner and T. Mudge, "Vertigo: Automatic performance-setting for Linux," Proc. of the 5th Operating Systems Design and Implementation (OSDI), Dec. 2002, pp. 105-116.

H. Zeng, C. Ellis, A. Lebeck, and A. Vahdat, "Currentcy: Unifying Policies for Resource Management," in USENIX 2003, June 2003.

Wednesday (11/03/04):

R. Sasanka, C.J. Hughes, and S.V. Adve, "Joint Local and Global Hardware Adaptations for Energy," Proceedings of the 10th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-X), October 2002.

M. Anand, E.B. Nightingale, and J. Flinn, "Ghosts in the Machine: Interfaces for Better Power Management. In Proceedings of the 2nd Annual International Conference on Mobile Systems, Applications, and Services (MOBISYS '04), Boston, MA, June 2004.

Monday (11/08/04):

G. Semeraro, G. Magklis, R. Balasubramonian, D.H. Albonesi, S. Dwarkadas, and M.L. Scott, "Energy Efficient Processor Design Using Multiple Clock Domains with Dynamic Voltage and Frequency Scaling," 8th International Symposium on High-Performance Computer Architecture, Feb 2002 (ps).

Q. Wu, P. Juang, M. Martonosi, and D.W. Clark, "Formal Online Methods for Voltage/Frequency Control in Multiple Clock Domain Microprocessors. ASPLOS 2004.

Wednesday (11/10/04):

A. Kansal, and M.B. Srivastava, "An environmental energy harvesting framework for sensor networks," Proceedings of International Symposium on Low power Electronics and Design (ISLPED 2003).

S. Roundy, P.K. Wright, and J. Rabaey, "A study of low level vibrations as a power source for wireless sensor nodes," Computer Communications, 26(11):1131-1144, July 2003.

S. Roundy, B. Otis, Y-H. Chee, J. Rabaey, and P.K. Wright, "A 1.9 GHz Transmit Beacon using Environmentally Scavenged Energy,"Proceedings of International Symposium on Low power Electronics and Design (ISLPED 2003).

Monday (11/15/04):

Jason Hill's Thesis, Chapter 6.

P. Zhang, C.M. Sadler, S. Lyon, and M. Martonosi," Hardware Design Experiences in ZebraNet. ACM SenSys '04.

Wednesday (11/17/04):

J. Polastre, J. Hill, and D. Culler, "Versatile Low Power Media Access for Wireless Sensor Networks," To appear in the Second ACM Conference on Embedded Networked Sensor Systems (SenSys), November 3-5, 2004.

Y. Xu, J. Heidemann, and D. Estrin,"Geography-informed Energy Conservation for Ad-hoc Routing," Proceedings of the Seventh Annual ACM/IEEE International Conference on Mobile Computing and Networking (ACM MobiCom), Rome, Italy, July 16-21, 2001.

Monday (11/22/04):

Jeff Chase, Darrell Anderson, Prachi Thakar, Amin Vahdat, and Ron Doyle, "Managing Energy and Server Resources in Hosting Centers," 18th Symposium on Operating Systems Principles (SOSP), October 2001.

Mootaz Elnozahy, Michael Kistler, Ramakrishnan Rajamony, "Energy Conservation Policies for Web Servers," Proceedings of the 4th USENIX Symposium on Internet Technologies and Systems, March 2003.

Optional, but recommended Readings: L. Barroso, J. Dean, and U. Holzle, "Web search for a planet: The Google Cluster Architecture," IEEE Micro, 23, 2, March-April 2003, pp. 22-28.

Wednesday (11/24/04):

John Zedlewski, Sumeet Sobti, Nitin Garg, Fengzhou Zheng, Arvind Krishnamurthy, and Randolph Wang, "Modeling Hard Disk Power Consumption," Usenix Conference on File and Storage Technologies, March 2003.

Sudhanva Gurumurthi, Anand Sivasubramaniam, and Mahmut Kandemir, Penn State University; Hubertus Franke, IBM T.J. Watson Research Center, "DRPM: Dynamic Speed Control for Power Management in Server Class Disks," International Symposium on Computer Architecture, June 2003.

Monday (11/29/04):

L.T. Clark, E.J. Hoffman, J. Miller, M. Biyani, Y. Liao, S. Strazdus, M. Morrow, K.E. Velarde, and M.A. Yarch, "An embedded 32-bit Microprocessor Core for Low-Power and High-Performance Applications," IEEE Journal of Solid-States Circuits, Nov. 2001.

G. Contreras, M. Martonosi, J. Peng, R. Ju and G.Y. Lueh, "XTREM: A Power Simulator for the Intel XScale Core," The 2004 Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'04), June 2004.

D. Genossar, and N. Shamir, "IntelŪ PentiumŪ M Processor Power Estimation, Budgeting, Optimization, and Validation," Intel Technology Journal, May 2003.

Wednesday (12/01/04):

R. Kumar, K. Farkas, N.P. Jouppi, P. Ranganathan, D.M. Tullsen, "Single-ISA Heterogeneous Multi-Core Architectures: The Potential for Processor Power Reduction," the 36th International Symposium on Microarchitecture, December, 2003.

Y. Li, D. Brooks, Z. Hu, and K. Skadron,"Performance,Energy, and Thermal Considerations for SMT and CMP Architectures," International Symposium on High-Performance Computer Architecture, Feb. 2005.

Monday (12/13/04):

H.M. Jacobson, "Improved clock-gating through transparent pipelining," ISLPED 2004.

Z. Hu, A. Buyuktosunoglu, V. Srinivasan, V. Zyuban, H. Jacobson, P. Bose, "Microarchitectural techniques for power gating of execution units," ISLPED 2004.

Wednesday (12/15/04):

S. Heo, K. Barr, and K. Asanovic, "Reducing Power Density through Activity Migration," International Symposium on Low Power Electronics and Design (ISLPED), Seoul, Korea, August 2003.

M. Powell, M. Gomaa, and T. N. Vijaykumar, "Heat-and-run: Leveraging SMT and CMP to manage power density through the operating system," In Proceedings of the 11th International Conference on architectural support for programming languages and operating systems (ASPLOS).