Architectural Modeling and Design with Technology Constraints

Goals

Exploring new architectures and software techniques that are aware of energy, temperature, and other lower-level design metrics is extremely important when designing modern computer systems.  New emphasis on computer systems that optimize design metrics besides raw performance, such as battery life, form-factor, and cost-efficiency provide many new challenges for system designers.  As the underlying technology continues to evolve, new design issues arise and existing challenges become more difficult.  Architectures that are aware of these issues can provide superior overall solutions.

This project involves two major research thrusts.

  • Developing models for key technology constraints like power and temperature at a level of abstraction and with the flexibility and accuracy required for architectural studies.

  • Studying both fundamental architectural design parameters and novel architectural techniques using these modeling approaches.

Students

Benjamin Lee

Xiaoyao Liang

Kristen Lovin

 

Publications

  • Benjamin C. Lee, Jamison Collins, Hong Wang, and David Brooks. “CPR: Composable Performance Regression for Scalable Multiprocessor Models,”  41st International Symposium on Microarchitecture (Micro-41), Lake Como, Italy, Nov. 2008. (pdf)

  • Benjamin C. Lee and David M. Brooks.  “Efficiency Trends and Limits from Comprehensive Microarchitectural Adaptivity,” International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-XIII), Seattle, WA, March 2008. (pdf)

  • Benjamin C. Lee and David Brooks. “Roughness of Microarchitectural Design Topologies and its Implications for Optimization,” 14th International Symposium on High-Performance Computer Architecture (HPCA-14), Salt Lake City, UT, February 2008. (pdf)

  • Benjamin C. Lee and David Brooks. “A Tutorial in Spatial Sampling and Regression Strategies for Microarchitectural Analysis,” IEEE Micro Special Issue: Hot Tutorials, May 2007. (pdf)

  • Benjamin C. Lee, David Brooks, Bronis de Supinski, Martin Schulz, Karan Singh, and Sally McKee. “Methods of Inference and Learning for Performance Modeling of Parallel Applications,” Symposium on Principles and Practice of Parallel Programming, San Jose, CA, March 2007. (pdf)

  • Benjamin C. Lee and David Brooks. “Illustrative Design Space Studies with Microarchitectural Regression Models,” 13th International Symposium on High-Performance Computer Architecture (HPCA-13), Phoenix, AZ, February 2007. (pdf)

  • Benjamin C. Lee and David Brooks. “Accurate and Efficient Regression Modeling for Microarchitectural Performance and Power Prediction,” International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-XII), San Jose, CA, October 2006. (pdf)

  • Benjamin C. Lee and David Brooks. “Statistically Rigorous Regression Modeling for the Microprocessor design space,” Workshop on Modeling, Benchmarking, and Simulation (MoBS-06, held in conjunction with ISCA-33), Boston, MA, June 2006. (pdf)

  • Yingmin Li, Benjamin Lee, David Brooks, Zhigang Hu, Kevin Skadron. “Impact of Thermal Constraints on Multi-Core Architectures,” 10th Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronics Systems, San Diego, CA, May 2006. (pdf)

  • Yingmin Li, Benjamin Lee, David Brooks, Zhigang Hu, and Kevin Skadron. “CMP Design Space Exploration Subject to Physical Constraints,” 12th International Symposium on High-Performance Computer Architecture (HPCA-12), February, 2006. (pdf)

  • Yingmin Li, Mark Hempstead, Patrick Mauro, David Brooks, Zhigang Hu, Kevin Skadron, "Power and Thermal Effects of SRAM vs. Latch-Mux Design Styles and Clock Gating Choices," International Symposium on Low Power Electronics and Design (ISLPED-05), August 2005. (pdf)

  • Benjamin C. Lee, and David Brooks, "Effects of Pipeline Complexity on SMT/CMP Power-Performance Efficiency," Workshop on Complexity Effective Design 2005 (WCED2005, held in conjuction with ISCA-32), June 2005. (pdf)

  • Yingmin Li, David Brooks, Zhigang Hu, and Kevin Skadron, "Performance,Energy, and Thermal Considerations for SMT and CMP Architectures," Eleventh International Symposium on High-Performance Computer Architecture, Feb. 2005. (pdf)

  • Yau Chin, John Sheu, and David Brooks, "Evaluating Techniques for Exploiting Instruction Slack," International Conference on Computer Design, October 2004. (pdf)

  • Yingmin Li, David Brooks, Zhigang Hu, Kevin Skadron, and Pradip Bose, "Understanding the Energy Efficiency of Simultaneous Multithreading," International Symposium on Low-Power Electronics and Design, August 2004. (pdf)

  • Victor Zyuban, David Brooks, Viji Srinivasan, Michael Gschwind, Pradip Bose, Philip N Strenski, and Philip G Emma, "Integrated Analysis of Power and Performance of Pipelined Microprocessors," IEEE Transactions on Computers, Volume 53, No. 8, August 2004. (pdf)

  • David Brooks, Pradip Bose, and Margaret Martonosi, "Power-Performance Simulation: Design and Validation Strategies," ACM SIGMETRICS Performance Evaluation Review, 2004. (pdf)

  • David Brooks, Pradip Bose, Viji Srinivasan, Michael Gschwind, Philip G. Emma, Michael G. Rosenfield, "Microarchitectural-Level Power-Performance Analysis: The PowerTimer Approach," IBM Journal of Research and Development, Volume 47, No. 5/6, Nov. 2003. (pdf)

 

Funding and Other Support

This research is supported in part by the National Science Foundation under CAREER Grant No. 0448313, Semiconductor Research Consortium (SRC), and by gifts by IBM and Intel. Any opinions, findings, and conclusions or recommendations expressed in this material are those of the author(s) and do not necessarily reflect the views of the National Science Foundation or any other sponsor.